Towards quantitative electrostatic potential mapping of working semiconductor devices using off-axis electron holography

Pronounced improvements in the understanding of semiconductor device performance are expected if electrostatic potential distributions can be measured quantitatively and reliably under working conditions with sufficient sensitivity and spatial resolution. Here, we employ off-axis electron holography to characterize an electrically-biased Si p–n junction by measuring its electrostatic potential, electric field and charge density distributions under working conditions. A comparison between experimental electron holographic phase images and images obtained using three-dimensional electrostatic potential simulations highlights several remaining challenges to quantitative analysis. Our results illustrate how the determination of reliable potential distributions from phase images of electrically biased devices requires electrostatic fringing fields, surface charges, specimen preparation damage and the effects of limited spatial resolution to be taken into account.