The temperature profile and bias dependent series resistance of Au/Bi4Ti3O12/SiO2/n-Si (MFIS) structures

The Bi4Ti3O12 (BTO) thin film were fabricated on an n-type Si substrate and annealed by rapid thermal annealing methods. The temperature dependence of capacitance–voltage (C–V) and conductance–voltage (G/ω–V) characteristics of the Au/Bi4Ti3O12/SiO2/n-Si metal–ferroelectric–insulator–semiconductor (MFIS) structures was investigated by taking the effects of series resistance (Rs) and interface states (Nss) in the temperature range of 80–400 K. Both the density of interface states Nss and series resistance Rs were found to be strongly temperature dependent. It is observed that the C–V and G/ω–V plots exhibit anomalous peaks at forward bias because of the influences of Nss and Rs. It has been experimentally determined that these peak positions shift from accumulation to inversion region, and the maximum values of the capacitance (C) and conductance (G) generally increase with temperature. Also, the distribution profile of Rs–V shows a peak in the accumulation region. The effect of Rs on the C and G is more pronounced in the studied temperature range. The experimental C–V–T and G/ω–V–T characteristics of MFIS structures show the expected behavior due to Nss in equilibrium with the semiconductor. The temperature dependent C–V and G/ω–V characteristics confirm that the Rs and Nss play an important role and strongly affect the electrical parameters of MFIS structure.