Relationship between interface property and energy band alignment of thermally grown SiO2 on 4H-SiC(0001)

Conduction band offset (ΔEc) at SiO2/4H-SiC(0001) interface formed by thermal oxidation in dry oxygen ambient and its modulation due to post-oxidation annealing (POA) in Ar ambient were investigated by x-ray photoelectron spectroscopy (XPS) and by electrical characterization. Valence band spectra and O 1s energy loss spectra taken from SiO2/SiC structures revealed that the ΔEc reduces with increasing POA temperature while no change in SiO2 band gap. Capacitance–voltage (C–V) characteristics for metal-oxide-semiconductor (MOS) capacitors with as-oxidized SiO2 gate dielectrics exhibited positive flatband voltage (VFB) shift of about 2 V, hysteresis of about 1 V, and large amount of interface states (Dit) of the order of 1012 cm−2 eV−1. High-temperature POA can improve the electrical property of SiO2/SiC capacitors, but at the same time a reduction of ΔEc is found in Fowler–Nordheim plots of current–voltage characteristics, which agrees with XPS analysis. VFB values plotted against oxide thicknesses exhibited a linear relationship with the positive slope for both as-oxidized and 1100 °C annealed samples, indicating that negative fixed charges (Qit) exist at the SiO2/SiC interfaces. The areal densities of Qit are estimated from the slopes are 1.0 × 1012 and 1.6 × 1011 cm−2 for as-oxidized and 1100 °C annealed samples, respectively. These results suggest that the conduction band offset at thermally grown SiO2/SiC interface is extrinsically increased by large amount of interface charges.