A hybrid model for computationally efficient fatigue fracture simulations at microelectronic assembly interfaces

Modern microelectronic assemblies are heterogeneous, layered structures joined by interconnects made of solder alloys with low homologous temperatures. The solder interconnections join devices to circuit boards and they fail by thermal fatigue fracture at their interfaces either to the device or to the circuit board. Predicting the fatigue fracture of the solder interconnections is a challenge due to the fact that they undergo large inelastic deformations during temperature cycling tests. In this paper we develop a hybrid approach inspired by cohesive zone fracture mechanics and the Disturbed State Concept to predict the crack trajectory and fatigue life of a solder interconnection subjected to both isothermal temperature cycling and anisothermal temperature cycling conditions (representing the two common accelerated test conditions for microelectronic products). A hybrid computational approach is used in which a first order approximation of the disturbance is used to estimate incremental cycles to criticality and thereby propagate the crack. The modeled crack fronts and the fatigue lives are validated through a comparison to results from the two types of accelerated tests. Overall, the model is shown to predict the fatigue life of the critical interconnection in the assembly to within 20% of the experimentally determined life. More importantly, the predicted crack trajectory is demonstrated to agree very well with the experimentally observed trajectory. Strikingly, the microscopically observed microstructural changes during crack propagation from that corresponding to creep fatigue to that of shear overload were found to be excellently correlated with the rate of change of the disturbance calculated in the model.