کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
4956646 | 1444589 | 2017 | 17 صفحه PDF | دانلود رایگان |
عنوان انگلیسی مقاله ISI
RTL implementations and FPGA benchmarking of selected CAESAR Round Two authenticated ciphers
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کلمات کلیدی
موضوعات مرتبط
مهندسی و علوم پایه
مهندسی کامپیوتر
شبکه های کامپیوتری و ارتباطات
پیش نمایش صفحه اول مقاله
چکیده انگلیسی
Authenticated ciphers are cryptographic transformations which combine the functionality of confidentiality, integrity, and authentication. This research uses register transfer-level (RTL) design to describe selected authenticated ciphers using a hardware description language (HDL), verifies their proper operation through functional simulation, and implements them on target FPGAs. The authenticated ciphers chosen for this research are the CAESAR Round Two variants of SCREAM, POET, Minalpher, and OMD. Ciphers are discussed from an engineering standpoint, and are compared and contrasted in terms of design features. To ensure conformity and standardization in evaluation, all four candidates are implemented with an identical version of the CAESAR Hardware API for authenticated ciphers. Functionally correct implementations of all four ciphers are realized, and results are compared against each other and previous results in terms of throughput, area, and throughput-to-area (TP/A) ratio. SCREAM is found to have the highest TP/A ratio of these four ciphers in the Virtex-6 FPGA, while Minalpher has the highest TP/A ratio in the Virtex-7 FPGA.
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Microprocessors and Microsystems - Volume 52, July 2017, Pages 202-218
Journal: Microprocessors and Microsystems - Volume 52, July 2017, Pages 202-218
نویسندگان
William Diehl, Kris Gaj,