کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
4970631 | 1450227 | 2017 | 9 صفحه PDF | دانلود رایگان |
عنوان انگلیسی مقاله ISI
AutoNFT: Architecture synthesis for hardware DFT of length-of-coprime-number products
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موضوعات مرتبط
مهندسی و علوم پایه
مهندسی کامپیوتر
سخت افزارها و معماری
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چکیده انگلیسی
Discrete Fourier Transform (DFT) is widely used in almost all fields of science and engineering. Meanwhile, modern applications processing big data, such as images and sound, require increasingly complex features, such as the long and non-power-of-two hardware DFT and floating-point operations with wide ranges and high effective resolutions. In this paper, we propose a method to extend the matrix-factorization-based DFT algorithm for performing non-power-of-two DFTs of length N equal to the product of coprime numbers. Based on this algorithm, we also present a new DFT architecture synthesizer with high portability, called AutoNFT, to generate hardware DFT in a fully parallel structure. The architecture also contains a high-performance floating-point core to work at 1Â GHz. DFTs generated by AutoNFT can run at 500 Mhz using a 40Â nm industry library. This technology can handle 115 billion fixed-point samples per second on 256-point DFT and 13.5 billion floating-point samples per second on 30-point DFT.
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Integration, the VLSI Journal - Volume 58, June 2017, Pages 339-347
Journal: Integration, the VLSI Journal - Volume 58, June 2017, Pages 339-347
نویسندگان
Gan Feng, Lan Yao, Song Chen,