Design of a high precision digital interface circuit for capacitive MEMS accelerometers with floating point ADC

Traditional analog blocks such as integrators are widely used in high precision MEMS accelerometers. However there is few cost-effective method to address the problem of analog integrators' output saturation due to the integrators' input offsets. A high precision digital capacitive MEMS accelerometer interface based on the traditional capacitive MEMS accelerometer sigma-delta interface is proposed to address this issue. An instantaneous floating point analog-to-digital converter (IFP ADC) is proposed to convert the analog frond-end amplifier (AFE) output signal to digital signal. The IFP ADC is very effective to digitalize the signal of the proposed interface circuit output, which is similar to Gaussian distribution. A Matlab simulation model is developed to evaluate the theory model. The implementation of digital loop filter realized in a FPGA board can overcome integrator offset issue. In addition, it is much easier to optimize a digital loop filter's parameter and reduce the chip cost. In this work, the AFE and voltage reference etc. are successfully fabricated by using the 0.18 µm mixed-signal CMOS process. The sensitivity and the noise floor of the AFE are respectively 0.71 V/pF and 3.16 µV/rt(Hz) in an open loop measurement. The evaluation PCB experimental result shows that the noise floor of the system is −135dBg/rt(Hz).