A compact implementation of a negative switched-capacitor voltage regulator dedicated to body-biasing of CMOS circuits

A fully integrated negative voltage regulator dedicated to body-biased circuits in FDSOI is proposed and validated through simulation. The regulator comprises an original negative switched-capacitor converter with a frequency modulation control loop. It can be digitally programmed by step of 100 mV in 100 μs time-scale from 100 mV to 1.3 V of negative voltage. The maximum overall power consumption is 20 μA to drive 1mm2 of digital load.