Analysis and design of a current-mode bandgap reference with high power supply ripple rejection

In this paper, a current-mode bandgap reference (BGR) circuit with cascode current mirrors and improved frequency compensation for achieving high power supply ripple rejection (PSRR) is presented. By slightly modifying a conventional frequency compensation scheme, the PSRR of the BGR is significantly enhanced. PSRRs of the BGR with the two different compensation techniques have been formulated and verified. Moreover, design considerations are presented, taking into account the critical parasitic capacitor's effect in PSRR. To our knowledge, this is the first time in the literature of explicitly demonstrating how the PSRR of a BGR is improved due to the frequency compensation. The feedback loop stability is also analyzed. The measured PSRR of an example BGR using the modified compensation fabricated in a standard 0.18-μm CMOS process is −77 dB and −62 dB at 1 kHz, and 100 kHz, respectively, with more than 40 dB improvement at the high frequency ranges over the design with the classical compensation.