A hybrid time-to-digital converter based on residual time extraction and amplification

This paper presents a novel hybrid time-to-digital converter (TDC) for high resolution and wide range time measurement, where a two-stage TDC cooperates with a two-step TDC. First the input time is roughly converted by a coarse-fine two-stage TDC to guarantee wide dynamic range and small quantization error. Then the residual time from the previous conversion is obtained by an extraction circuit and further quantified by a two-step TDC for ultra fine resolution, where the extracted residue is linearly enlarged by a time amplifier (TA), followed by adopting a tapped delay line with original gate delay resolution for measurement. The TA is regulated by delay-locked-loop (DLL) to keep its gain stable under process, voltage and temperature variations. Using full-custom approach, a test chip was designed and implemented in TSMC 0.35-μm CMOS process. With an input reference clock of 100 MHz, the proposed 13-bit hybrid TDC achieves a resolution of 320 ps, a full range of 2.55 μs and a single-shot precision of 0.73 LSB. The DNL is less than ±0.68 LSB and INL is within −1.23 LSB to 1.19 LSB.