Standby and dynamic power minimization using enhanced hybrid power gating structure for deep-submicron CMOS VLSI

Standby and dynamic power minimization using enhanced hybrid power gating structure for deep-submicron CMOS VLSI

Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Microelectronics Journal - Volume 62, April 2017, Pages 137-145

J. Jeba Johannah, Reeba Korah, Maria Kalavathy, Sivanandham Sivanandham,