Investigation of microstructure and electrical properties of Sm doped ceria thin films

SEM analysis reveals that grain size increases at 323 K, 423 K, and 573 K substrate temperatures and decreases at 723 K and 873 K temperatures. The preferential out-of-plane orientations of thin SDC films were (111) and (222). Texture coefficients of those orientations decrease at high deposition rates (1.2 nm/s and 1.6 nm/s) and high substrate temperatures (723 K and 873 K). The preferential orientation changes to (220) or (222) using SiO2 substrates (1.2 nm/s and 1.6 nm/s growth rate; 423 K, 723 K, and 873 K substrate temperature) and to (200), (220), or (311) using Alloy 600 substrates (0.2 nm/s, 0.8 nm/s, 1.2 nm/s, and 1.6 nm/s deposition rate; 723 K and 873 K substrate temperature). Crystallite size increases from 6.8 nm to 80.6 nm with increasing substrate temperatures (323 K ÷ 873 K) and influences total conductivity of SDC thin films; it increases (0.03·10− 3 S/m ÷ 1.12 S/m) with increasing crystallite size. Ce3 + concentrations change from 24.5% to 29.1% in thin SDC films and do not show clear correlation with changes of total conductivity. In addition, thin films deposited at 323 K ÷ 423 K temperatures and 0.4 nm/s ÷ 1.6 nm/s deposition rates have reduced total conductivity.