کد مقاله کد نشریه سال انتشار مقاله انگلیسی نسخه تمام متن
537611 870843 2013 8 صفحه PDF دانلود رایگان
عنوان انگلیسی مقاله ISI
Automated design of networks of transport-triggered architecture processors using dynamic dataflow programs
موضوعات مرتبط
مهندسی و علوم پایه مهندسی کامپیوتر چشم انداز کامپیوتر و تشخیص الگو
پیش نمایش صفحه اول مقاله
Automated design of networks of transport-triggered architecture processors using dynamic dataflow programs
چکیده انگلیسی


• A dedicated co-design flow for embedded multi-core platforms has been implemented.
• The toolchain functionality is demonstrated for two different FPGA boards.
• QCIF video sequences are decoded at 45 FPS at 50 MHz.

Modern embedded systems show a clear trend towards the use of Multiprocessor System-on-Chip (MPSoC) architectures in order to handle the performance and power consumption constraints. However, the design and validation of dedicated MPSoCs is an extremely hard and expensive task due to their complexity. Thus, the development of automated design processes is of highest importance to satisfy the time-to-market pressure of embedded systems.This paper proposes an automated co-design flow based on the high-level language-based approach of the Reconfigurable Video Coding framework. The designer provides the application description in the RVC-CAL dataflow language, after which the presented co-design flow automatically generates a network of heterogeneous processors that can be synthesized on FPGA chips. The synthesized processors are Very Long Instruction Word-style processors. Such a methodology permits the rapid design of a many-core signal processing system which can take advantage of all levels of parallelism.The toolchain functionality has been demonstrated by synthesizing an MPEG-4 Simple Profile video decoder to two different FPGA boards. The decoder is realized into 18 processors that decode QCIF resolution video at 45 frames per second on a 50 MHz FPGA clock frequency. The results show that the given application can take advantage of every level of parallelism.

ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Signal Processing: Image Communication - Volume 28, Issue 10, November 2013, Pages 1295–1302
نویسندگان
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