کد مقاله کد نشریه سال انتشار مقاله انگلیسی نسخه تمام متن
538466 871093 2013 14 صفحه PDF دانلود رایگان
عنوان انگلیسی مقاله ISI
A gate-delay model focusing on current fluctuation over wide range of process–voltage–temperature variations
موضوعات مرتبط
مهندسی و علوم پایه مهندسی کامپیوتر سخت افزارها و معماری
پیش نمایش صفحه اول مقاله
A gate-delay model focusing on current fluctuation over wide range of process–voltage–temperature variations
چکیده انگلیسی

This paper proposes a gate-delay model suitable for timing analysis that takes into consideration wide-ranging process–voltage–temperature (PVT) variations. The proposed model translates an output-current fluctuation due to PVT variations into modifications of the output load and input waveform. After translation, any conventional model can compute delay taking into account PVT variations by using the modified output load and reshaped input waveform. Experimental results with 90- and 45-nm technologies demonstrate that the average error of the fall and rise delay estimation in single- and multi-stage gates was approximately 5% on average over a wide range of input slews, output loads, and PVT variations. The proposed model can be used in Monte Carlo STA (static timing analysis) in addition to corner-based timing analysis. It can be also used in statistical STA to calculate the sensitivities of delays to variation parameters on-the-fly even when the nominal operating condition changes as well.


► This paper proposes a gate-delay model suitable for wide-ranging PVT variations.
► The proposed model can be used in Monte Carlo STA in addition to corner-based timing analysis.
► The model can compute delay sensitivities to variation parameters on-the-fly for statistical STA.

ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Integration, the VLSI Journal - Volume 46, Issue 4, September 2013, Pages 345–358
نویسندگان
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