Critical path-aware voltage island partitioning and floorplanning for hard real-time embedded systems

• We present an MSV-aware floorplanning framework for hard real-time embedded systems.
• The framework objectives are temperature, power, wire, area and fragmentation cost.
• We use MILP to perform multi-objective MSV partitioning and SA to do floorplanning.
• To cope with complexity of large systems a heuristic algorithm is presented.

Temperature and power are two major issues for multiple supply voltage (MSV)-aware embedded systems that due to their different physical behavior are required to be considered together in the system design especially in applications with hard real-time constraints. In such applications critical path characteristics of a task graph play a key role in finding an MSV-aware floorplan that attempts to optimize temperature and power simultaneously. In this paper, we propose a multi-objective optimization framework to find an MSV-aware floorplan that satisfies these objectives simultaneously in the embedded system design process. This framework is based on integer linear programming (ILP) formulation which is further enhanced with a simulated annealing technique to reduce the complexity of the problem and thus execution time of it. As a trade-off between accuracy and execution time, a heuristic algorithm is also presented for scenarios with rather large design space where finding the optimal solution or Pareto optimal set is a formidable task and time consuming. The experimental results show that the proposed framework suggests floorplans that are more power-efficient compared to the cases that only attempt to optimize the temperature and attains lower temperature compared to the cases that only optimize the power. These results confirm the effectiveness of the proposed approach. Moreover, an interesting and counter-intuitive finding is that by increasing the supply voltage magnitude of the MSV-chip the total power and peak temperature not only do not increase but also decrease in some scenarios. This is due to the impacts of the critical paths of the application graph.