کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
540292 | 871304 | 2008 | 12 صفحه PDF | دانلود رایگان |
![عکس صفحه اول مقاله: Buffering global interconnects in structured ASIC design Buffering global interconnects in structured ASIC design](/preview/png/540292.png)
Structured ASICs present an attractive alternative to reducing design costs and turnaround times in nanometer designs. As with conventional ASICs, such designs require global wires to be buffered. However, via-programmable designs must prefabricate and preplace buffers in the layout. This paper proposes a novel and accurate statistical estimation technique for distributing prefabricated buffers through a layout. It employs Rent's rule to estimate the buffer distribution required for the layout, so that an appropriate structured ASIC may be selected for the design. Experimental results show that the buffer distribution estimation is accurate and economic, and that a uniform buffer distribution can maintain a high degree of regularity in design and shows a good timing performance, comparable with nonuniform buffer distribution.
Journal: Integration, the VLSI Journal - Volume 41, Issue 2, February 2008, Pages 171–182