کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
540996 | 871365 | 2014 | 14 صفحه PDF | دانلود رایگان |
• In this work a kernel convolution vision sensor is designed.
• The processing is performed in parallel among all array pixels in digital bit serial fashion.
• The proposed processing element is compact enough to fit inside an image sensor pixel.
• The design is able to perform arbitrary size kernel convolution with simple and regular interconnections between adjacent pixels.
The high speed and in-pixel processing of image data in smart vision sensors is an important solution for real time machine vision tasks. Diverse architectures have been presented for array based kernel convolution processing, many of which use analog processing elements to save space. In this paper a digital array based bit serial architecture is presented to perform certain image filtering tasks in the digital domain and hence gain higher accuracies than the analog methods. The presented method benefits from more diverse convolution options such as arbitrary size kernel windows, compared with the digital pulse based approaches. The proposed digital cell structure is compact enough to fit inside an image sensor pixel. When incorporated in a vision chip, resolutions of up to 12 bit accuracy can be obtained in kernel convolution functions with 35×28 μm2 layout area usage per pixel in a 90 nm technology. Still, higher accuracies can be obtained with larger pixels. The power consumption of the approach is approximately 10 nW/pixel at a frame rate of 1 kfps.
Journal: Integration, the VLSI Journal - Volume 47, Issue 4, September 2014, Pages 417–430