کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
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541653 | 871479 | 2014 | 6 صفحه PDF | دانلود رایگان |
In this report we focus on the performance of nanoscale double gate (DG) junctionless (JL) and inversion mode (IM) MOSFETs. The study is performed using an analytical 2-D modeling approach from our previous work and an extension for the inclusion of carrier quantization effects (QEs). The model itself is physics-based, predictive and valid in all operating regimes. Important device metrics such as the drain-induced barrier lowering (DIBL), subthreshold slope (S ) and the Ion/IoffIon/Ioff ratios are in focus and discussed. The model is compared versus 2-D numerical simulation results from TCAD Sentaurus. To stand the pace with recent ITRS requirements for future CMOS technology, we target devices with a minimum channel length of 16 nm and channel thicknesses down to 3 nm. The purpose of the research is to gain knowledge about the device׳s performance at such aggressively scaled dimensions.
Journal: Microelectronics Journal - Volume 45, Issue 9, September 2014, Pages 1220–1225