Introducing a technology index concept and optimum performance design procedure for single-electron-device based circuits

Single electron devices (SEDs) are utilized in designing many logic gates; however, in most cases the examination of the circuits is limited to a DC analysis that only indicates the correct performance of the circuits' logic function. This paper focuses mainly on the issue of optimization. In this regard, comparison of different designs is needed, but it is not possible to compare two different designs unless they both belong to a single technology or can be scaled to a same technology. So, we first introduce a technology index for SEDs, which allows meaningful comparisons between various designs of different technologies. Then, we describe a method for scaling these designs into a single identical technology, and clarifying the relations between the involved concepts. Using two examples, we explain an optimum design method for digital logic gates based on SEDs. Finally, the results of these two examples are presented and compared with the original designs. The comparison showed that all the three major performance features, including lower bit error rate, higher operation frequency, and higher temperature operation are improved in the proposed optimized design.