Analysis of low voltage bulk-driven self-biased high swing cascode current mirror

A novel low voltage self-biased high swing cascode current mirror (SHCCM) employing bulk-driven NMOS transistors is proposed in this paper. The comparison with the conventional circuit reveals that the proposed bulk-driven circuit operates at lower voltages and provides enhanced bandwidth with improved output resistance. The proposed circuit is further modified by replacing the passive resistance by active MOS realization. Small signal analysis of the proposed and conventional SHCCM are carried out to show the improvement achieved through the proposed circuit. The circuits are simulated in standard SPICE 0.25 μm CMOS technology and simulated results are compared with the theoretically obtained results. To ensure robustness of the proposed SHCCM, simulation results of component tolerance and process variation have also been included.