Energy efficiency of error control coding in intra-chip RF/wireless interconnect systems

Continuous scaling of conventional hard-wired metal interconnects into deep sub-micrometer region (DSM) has resulted in significant performance degradation in terms of delay, crosstalk noise, higher power dissipation, and decreased tolerance to noise. Besides, communication-centric nature of system-on-chip (SOC) networks requires efficient intra- and inter-chip interconnect technologies. Radio-frequency (RF)/wireless interconnects promise to be the best alternative to metal interconnects as they are compatible with current CMOS-technology, and they also provide higher data rate and bi-directional multi I/O transmissions. This paper evaluates the system bit-error-rate (BER) performance with the application of fault-tolerance capability using linear error-control codes (ECCs) within chip (intra-chip) RF/wireless interconnect systems. It also evaluates the utility of ECCs by considering energy consumed in ECC encoding–decoding vis-à-vis the energy saved due to coding gain by calculating the critical distance (dcr). The results indicate that for a certain range of received signal-to-noise ratio (SNR), application of ECC improves the BER performance of the RF/wireless interconnect system. It is also shown that dcr drops to 0.7 mm at 18 GHz.