A novel bus transfer mode (AS transfer) and a performance evaluation methodology

• A high-performance on-Chip bus transfer– the AES state transfer (AS) is proposed.
• The ASBUS is suitable to IoT devices which should be low-cost and low-energy.
• An on-chip bus performance evaluation methodology is proposed.
• The methodology helps architects to runtime estimate transfer performance.

This paper proposes an innovative on-Chip bus transfer mode – the Advanced Encryption Standard (AES) state transfer (AS) and a performance evaluation methodology to estimate the transfer performance. By modeling and collecting several performance metrics including bus latency, bandwidth, valid bandwidth, power and energy consumption using the methodology, it enhances fidelity of the performance analysis and evaluation. As a case study, we formally complete the hardware implementation flow on Advanced High-Performance Bus (AHB), Advanced eXensible Interface 4 (AXI4) and AS bus (ASBUS) DMA, and demonstrate high estimation accuracy by comparing all the experimental results. Both static analysis and hardware implementation results show that the data transfer latency is close to 29% of AHB and 58% of AXI4 by using the AS transfer. Moreover, it is observed that this high-efficiency transfer mode of ASBUS helps to enhance the valid data bandwidth to around 3.4 times that of AHB and 1.7 times that of AXI4, and the energy consumption of ASBUS is only a half of AHB and AXI4. Furthermore, the proposed evaluation methodology is effectively used with sufficient accuracy (the average estimation error: 3.3%) in the design flow.