High-resolution background calibrated ADCs for software-defined radios

Next-generation transceivers operating with different standards require the existence of a wide bandwidth and highly linear analog-to-digital converters (ADCs) to enable software-defined radios (SDR). Several methods dealing with the design and implementation of high-resolution and high-speed ADCs to provide the stringent requirements of the wide-bandwidth transceivers are presented. A special focus is made on pipelined ADC for its superior performance in terms of speed and resolution. A digital background calibration technique to compensate for the capacitors mismatch, and the finite opamps gain is presented. Low overhead digitally oriented technique to increase the speed of the ADC beyond the technological limits by overcoming the problems of the conventional time-interleaving is also presented. Simulation results prove the effectiveness of these techniques.