Reconfigurable ΔΣΔΣ modulator topology design through hierarchical mapping and constraint extraction

This paper presents a novel methodology for designing reconfigurable continuous-time ΔΣΔΣ modulator topologies while considering circuit-level implementation constraints. Topologies are optimized for minimizing their structural complexity, maximizing their robustness with respect to circuit nonidealities, and maximizing the feasibility of their circuit-level implementation. A case study for a three mode reconfigurable ΔΣΔΣ modulator shows that the produced topologies avoid circuit-level implementation difficulties existing in other approaches.