ASLIC: A low power CMOS analog circuit design automation

This paper proposes an efficient automation platform that provides fast and reliable path to analog circuit design for desired specifications. Circuit heuristics and hierarchy are employed to aid efficient design flow. As a synthesis method, procedural planning of design equations is developed to improve accuracy. To cope with the low power requirements of recent analog design trend, automation flow of subthreshold analog circuit is developed based on weak inversion model. The proposed and developed tool is applied to several test cases. The results show that design time is reduced from weeks to seconds, and at the same time, a significantly accurate circuit behavior for the desired performance specification is obtained.