A comparative experimental investigation on responsivity and response speed of photo-diode and photo-BJT structures integrated in a low-cost standard CMOS process

A variety of smart imaging and neuromorphic applications perform time-domain image acquisition in order to imitate biological systems and reduce the growing transmission bandwidth of the modern imaging devices. Because they operate in time-domain, they require the highest possible pixel responsivity and response speed. This work provides a comparative experimental study of different unconventional photodetecting structures with respect to these parameters. Several on-chip photodetecting device structures are designed using a low-cost standard 0.18μm CMOS process. The comparison in terms of measured quantum efficiency, light responsivity and the response speed is presented between conventional and comb-shaped N-well/P-substrate photodiodes, conventional and comb-shaped, vertical and lateral photo-bipolar-junction-transistors (photo-BJTs) and a Darlington pair of bipolar-junction phototransistors. The photodetectors are embedded in a conventional three transistor active pixel topology and measured using a customized low-cost measurement setup. The pixel quantum efficiency, responsivity and response speed are measured for each structure and the results are presented in detail. The obtained results demonstrate the benefits of using standard-CMOS-compatible BJT structures in time-domain applications. The BJT-based photodetectors show increased responsivity to green–yellow light region (500–600 nm wavelength) compared to conventional N-well/P-substrate diode. The highest responsivity is achieved by a combination of lateral and vertical BJT. The fastest response is achieved by the rarely used Darlington pair configuration of BJTs, which demonstrates the potential benefit of using this structure for time-domain imaging applications. A low-cost measurement setup and the measurement methodology are described in detail to make the experiment reproducible for any other standard CMOS process.