A 1 V, 69–73 GHz CMOS power amplifier based on improved Wilkinson power combiner

A 1 V, 69–73 GHz CMOS power amplifier based on improved Wilkinson power combiner is presented. Compared with the traditional one, the proposed Wilkinson power combiner could lower down the insertion loss and reduce the die area by eliminating the quarter-wavelength transmission lines while preserving the characteristics of Wilkinson power combining and good port isolation. The presented power amplifier has been implemented in 65 nm CMOS process and achieves a measured saturated output power of 10.61 dBm and a peak power added efficiency of 8.13% at 73 GHz with only 1 V power supply. The die area including pads is 1.23×0.45 mm2, while the power combiner only occupies 200×80 μm2.