کد مقاله کد نشریه سال انتشار مقاله انگلیسی نسخه تمام متن
543540 871667 2011 5 صفحه PDF دانلود رایگان
عنوان انگلیسی مقاله ISI
Low-voltage, high-speed CMOS analog latched voltage comparator using the “flipped voltage follower” as input stage
کلمات کلیدی
موضوعات مرتبط
مهندسی و علوم پایه مهندسی کامپیوتر سخت افزارها و معماری
پیش نمایش صفحه اول مقاله
Low-voltage, high-speed CMOS analog latched voltage comparator using the “flipped voltage follower” as input stage
چکیده انگلیسی

The design and characterization of a low-voltage, high-speed CMOS analog latched voltage comparator based on the flipped voltage follower (FVF) cell and input signal regeneration is presented. The proposed circuit consists of a differential input stage with a common-mode signal detector, followed by a regenerative latch and a Set–Reset (S–R) latch. It is suitable for successive-approximation type’s analog-to-digital converters (ADC), but can also be adapted for use in flash-type ADCs. The circuit was fabricated using 0.18 μm CMOS technology, and its measured performance shows 12-bit resolution at 20 MHz comparison rate and 1 V single supply voltage, with a total power consumption of 63.5 μW.

ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Microelectronics Journal - Volume 42, Issue 5, May 2011, Pages 785–789
نویسندگان
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