Staircase-down SET programming approach for phase-change memories

This paper presents a staircase-down SET programming technique for phase-change memories (PCMs). The proposed programming approach allows compensating for spreads in cell physical parameters and obtaining adequately narrow cell distributions, which results in improved read margin. The cell programming curve is experimentally evaluated and discussed. The effectiveness of the proposed technique is demonstrated by comparing cell distributions obtained on an 8-Mb bipolar junction transistor (BJT)-selected PCM demonstrator by means of a conventional SET box pulse and a staircase-down SET pulse, respectively.