Comparative study of reliability degradation behaviors of LDMOS and LDMOS-SCR ESD protection devices

• Devices of LDMOS and LDMOS-SCR are taped out in 0.35 um BCD process and tested by Bath 4002.
• LDMOS trigger voltage walk-in effect is researched with different temperature and gate bias voltage.
• LDMOS-SCR's trigger voltage and leakage current degrade greatly in high ambient temperature.

This paper presents a comparative study on the electrostatic discharge (ESD) characteristics of Lateral Diffused Metal-Oxide-Semiconductor (LDMOS) and LDMOS with embedded silicon controlled rectifier (LDMOS-SCR) by using transmission line pulsing (TLP) measurements. Results show that the safe operating area (SOA) of LDMOS shrank pronouncedly and its reliability degraded due to the walk-in of trigger voltage (Vt1). The Vt1 walk-in is attributed to the so called weak spot filament created/grown near the N + drain region in previous ESD strike. The isolation drain structure in LDMOS-SCR can solve this issue. However, both devices were found to be not robust enough when they were subjected to be operated at high temperature ambient.