کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
545930 | 871859 | 2013 | 7 صفحه PDF | دانلود رایگان |
Static leakage currents represent a major issue in nano-scale CMOS. In digital VLSI circuits, the most relevant contributions to the overall leakage current are subthreshold conduction, gate current and band-to-band-tunneling (BTBT) current, which flows from drain/source to bulk through the reverse biased diffusion junctions. While the latter has been recognized as an important effect in digital nano-CMOS, yet no compact model of it has ever been included in the industry-standard device model BSIM4. In this work, we show that the lack of a BTBT current model leads to discrepancies between SPICE and device-level simulations and that adding a BTBT current source into BSIM4 DC model can correct this. The new current source follows a widely accepted physical model of the BTBT phenomenon with a rectangular junction approximation. Test case results show a good agreement between the new circuit-level simulations and the device-level extracted currents.
► SPICE-BSIM4 simulations do not take into account the band-to-band-tunneling (BTBT) phenomenon.
► In device-level simulations the reverse biased drain–bulk current is dominated by the BTBT current.
► A new BTBT current source is integrated into the BSIM4 DC equivalent circuit model.
► The new model shows a good agreement with device-level simulations in a 25 nm technology.
Journal: Microelectronics Journal - Volume 44, Issue 1, January 2013, Pages 26–32