Voltage dependent degradation of HfSiON/SiO2 nMOSFETs under positive bias temperature instability

• PBTI stress generated shallow traps in HfSiON dielectric.
• The exponent of power-law for ΔVth increased exponentially with stress voltage.
• The power-law was modified to include experimental observations.
• The modified model can predict device lifetime accurately using acceleration test.

This paper investigates voltage-dependent degradation of HfSiON/SiO2 nMOSFETs under conditions of positive bias temperature instability (PBTI), and proposes a PBTI degradation model that can use data from acceleration tests to predict device lifetime accurately. Experimental results show that the PBTI stress generated shallow traps in HfSiON and the exponent of power-law for threshold-voltage shift increased exponentially with an increase of PBTI stress voltage. An enhancement factor that represents creation of shallow charge traps in gate dielectric by PBTI stress was included in the proposed model. The proposed model predicted operational lifetime tL = 1.64 × 1010 s, which agreed well with the tL = 1.92 × 1010 s measured at low gate stress voltage, whereas the conventional model overestimates tL by an order of magnitude, demonstrating that the proposed model is very useful on shortening the measurement time for estimating tL of high-k nMOSFETs.

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