کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
546907 | 1450480 | 2016 | 11 صفحه PDF | دانلود رایگان |

This paper presents a stochastic flash analog-to-digital converter (ADC), implemented in a three-dimensional stacked technology. Due to vertical stacking, the 3D technology reduces the ADC footprint area, and a power consumption benefit for the 3D ADC is demonstrated compared with the 2D design. An all digitally synthesized stochastic 3D ADC was implemented using 130 nm GlobalFoundries device technology and Tezzaron through-silicon-vias (TSV) technology. Different TSV insertion methods were used and compared. A 20% improvement in power consumption is observed in the 3D implementation compared with the 2D counterpart. Thanks to the vertical stacking dies, a 40% footprint reduction is achieved in the 3D implementation. Two different integration topologies for 3D ADC and an ultrasound transducer arrays are considered and compared. Either the circuit dies are facing up, resulting in a face-to-face bonding between the transducer arrays and the three dimensional integrated circuit (3D IC), or the 3D IC dies are facing down, resulting a face-to-back connection. The simulation results show that the 3D face-up integration suppresses the TSV coupling noise to the analog input by around 10 dB.
Journal: Microelectronics Journal - Volume 48, February 2016, Pages 39–49