کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
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547094 | 871977 | 2014 | 6 صفحه PDF | دانلود رایگان |
A new voltage controlled oscillator (VCO) in a 0.18 μm CMOS process is offered in this paper. This paper׳s argument is to provide an innovative approach to improve the phase noise which is one of the most controversial issues in VCOs. Contrary to most ideas that have been put forward to decrease phase noise which are based on higher current dissipation to increase output voltage swing, this new method offers better specifications with respect to traditional solutions. The presented circuit is capable of extra oscillation amplitude without increasing the current level, taking advantages of tail current elimination and topology optimization. Analysis of the presented peak voltage amplitude can verify the optimum performance of the proposed. Post-layout simulation results at 2.3 GHz with an offset frequency of 1 MHz and 3 MHz show a phase noise of about −125 dBc/Hz and −136.5 dBc/Hz, respectively, with the current of 1.3 mA from 1.8 V supply. Also, Monte Carlo simulation is used to ensure the sensitivity of the proposed circuit to process and frequency variations are very promising.
Journal: Microelectronics Journal - Volume 45, Issue 8, August 2014, Pages 1008–1013