Quantum physical synthesis: Improving physical design by netlist modifications

Quantum circuit design flow consists of two main tasks: synthesis and physical design. In the current flows, two procedures are performed subsequently and without any information sharing between two processes that can limit the optimization of the quantum circuit metrics; synthesis converts the design description into a technology-dependent netlist and then physical design takes the fixed netlist, produces the layout, and schedules the netlist on the layout. To address the limitations imposed on optimization of the quantum circuit objectives because of no information sharing between synthesis and physical design processes, in this paper we introduce physical synthesis concept in quantum circuits to improve the objectives by manipulating layout or netlist locally considering layout information. We propose a technique for physical synthesis in quantum circuits using gate-exchanging heuristic to improve the latency of quantum circuits. Moreover, a physical design flow enhanced by the technique is proposed. Our experimental results show that the proposed physical design flow empowered by the gate exchanging technique decreases the average latency objective of quantum circuits by about 24% for the attempted benchmarks.