Analysis and simulation of a novel gradually low-K dielectric structure for crosstalk reduction in VLSI

Crosstalk noise and delay uncertainty are two major problems in modern very large scale integration (VLSI) design. To overcome these difficulties, a new dielectric structure is proposed for integrated circuits, which is in contrast to the conventional Cu/low-K technology. Both structures are simulated employing a field solver and a time domain simulator. Using the new dielectric structure, near- and far-end crosstalk noises are reduced 45.2% and 15% in the test dimensions, respectively. The proposed structure, called gradually low-K, exhibits negligible side-effects in terms of delay and power consumption. Therefore, it is shown that the gradually low-K structure is a relevant choice to overcome the crosstalk and delay uncertainty problems, especially in the global interconnects tier.