Crosstalk analysis for a CMOS gate driven inductively and capacitively coupled interconnects

This paper deals with crosstalk analysis of a CMOS driven capacitively and inductively coupled interconnect. The Alpha Power Law model of MOS transistor is used to represent a CMOS driver. This is combined with a transmission line-based coupled RLC model of interconnect to develop a composite model for analytical purpose. On this basis a transient analysis of crosstalk noise is carried out. Comparison of the analytical results with SPICE extracted results shows that the error involved is nominal.