Design of adaptive supply voltage for sub-threshold logic based on sub-1 V bandgap reference circuit

This paper presents the design methodology to produce an adaptive supply voltage, which is used to drive digital sub-threshold logic system. Design guidelines to maintain constant speed and power via adaptive VDD regulation are presented first. Then the paper discusses modification of sub-1 V bandgap reference (BGR) circuits using dynamic threshold MOSFET technique to provide the necessary adaptive reference voltage. Another well-known sub-1 V BGR circuit using current mode technique is also fabricated and compared. Both circuits are implemented in CMOS 0.18 μm technology. Empirical data from SPICE simulation and first order approximation techniques are used to derive analytical design models used inside BGR circuit. Measurement results of both the fabricated circuits show reference voltage output of 500 mV range; which are in good match of SPICE simulation.