Strategy of logic synthesis using MTBDD dedicated to FPGA

The paper presents a synthesis strategy oriented to the implementation of multi-output functions into LUT-based FPGA. The key elements of the proposed method include the decomposition of multi-output functions and a technology mapping strategy. The essence of the proposed approach is based on searching for an appropriate decomposition path and the idea of cosharing logic resources. In the process of looking for cosharing logic resources, the algorithm which searches for equivalence classes plays a vital role, and is implemented on the basis of proposed modifications of BDD diagrams. The results obtained were compared with synthesis results from competitive methods.