Diagnosis algorithms for a reconfigurable and defect tolerant JTAG scan chain in large area integrated circuits

A set of routing algorithms is proposed to diagnose multiple defects in a class of reconfigurable and defect tolerant JTAG scan chains. These algorithms find a maximum number of functional elements with a minimum set of paths with an affordable reconfiguration time. A heuristic dichotomic search algorithm is applied on the nonfunctional paths to accurately locate defective elements. Experiments demonstrate that our algorithms accurately pinpoint 99.1% of single defects and 71% of multiple defects when eight defects were randomly injected. They were also successfully applied on a large area integrated circuit where multiple clusters of defects were located.