کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
6944919 | 1450452 | 2018 | 6 صفحه PDF | دانلود رایگان |
عنوان انگلیسی مقاله ISI
Low-leakage analog switches for low-speed sample-and-hold circuits
ترجمه فارسی عنوان
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کلمات کلیدی
موضوعات مرتبط
مهندسی و علوم پایه
مهندسی کامپیوتر
سخت افزارها و معماری
چکیده انگلیسی
In this paper, two leakage-combating analog switches for low-speed sample-and-hold (S/H) circuits are proposed. In conventional low-leakage switch, the potential drop along MOSFET is clamped to zero to suppress sub-threshold leakage. Based on this switch, the proposed leakage-combating analog switches can suppress p-n junction reverse-biased leakage by clamping the potential drop along parasitic p-n junction to zero. The proposed two switches are designed and fabricated with a 0.13â¯Î¼m CMOS process in a prototype chip. The experiment results illustrate that the order of magnitude of the leakages from the proposed two switches only change from 10â15â¯A to 10â12â¯A in the temperature range from â20â¯Â°C to 120â¯Â°C, which is many times lower than that of the traditional switch. FFT simulations of the S/H circuits using the proposed switches are performed. On the condition of 0.01â¯kS/s and 100â¯Â°C, the THDs of the S/H circuits with these proposed switches are â53.98â¯dB, â61.09â¯dB respectively. The proposed switches are suitably applied in low-speed S/H circuits.
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Microelectronics Journal - Volume 76, June 2018, Pages 22-27
Journal: Microelectronics Journal - Volume 76, June 2018, Pages 22-27
نویسندگان
Jiangtao Xu, Xiaolin Shi, Zhiyuan Gao, Kaiming Nie,