High Level Model of Time Predictable Multitask Control Unit

The paper describes the high level abstract SystemC model of the multitask real time system. The authors put their main effort to obtain the highly time predictable system, The time predictability of real time embedded, electronic systems is identified and a concise survey of various approaches to the problem are given. The architecture of a single pipeline processor core with thread interleaving mechanism is emphasized. The scheduling algorithms that enable optimal utilization of the processing units are illustrated on examples. The main memory access control unit and the original memory system organization are described. Many simulation experiments conducted with single and multi-core system architecture implementation, allow obtaining results that prove advantages of the presented model.