A novel source-drain follower for monolithic active pixel sensors

A test chip, manufactured in a 180 nm CMOS image sensor process, implements small prototype pixel matrices in different flavors to compare the standard SF to the novel SF and to the novel SF with additional shielding. The effective sensing node capacitance was measured using a 55Fe source. Increasing reverse substrate bias from −1 V to −6 V reduces Ceff by 38% and the equivalent noise charge (ENC) by 22% for the standard SF. The SDF provides a further 9% improvement for Ceff and 25% for ENC. The SDF circuit with additional shielding provides 18% improvement for Ceff, and combined with −6 V reverse bias yields almost a factor 2.