A CMOS, low-power current-mirror-based transimpedance amplifier for 10 Gbps optical communications

In this paper, a new low-power CMOS optical transimpedance amplifier (TIA) for 10 Gbps applications is proposed. The main objective of this work is to achieve low-power consumption while meeting other required performances. The input resistance is considerably decreased due to the use of diode-connected input stage at the input node. Moreover, the output node benefits from an active inductive peaking technique which is used as the output load to extend the frequency bandwidth while keeping the low-power performance of the proposed TIA. Moreover, the core amplifier uses no passive elements which leads to a small chip area. Furthermore, to verify the performance of the proposed TIA, the circuit simulations are done in HSPICE using 90 nm CMOS technology parameters. So, the simulation results show the transimpedance gain of 40.5 dbΩ, -3 dB frequency bandwidth of 7 GHz, input referred noise of 20.3pA/√Hz and the power consumption value of only 1.4 mW at 1 V supply. Finally, other simulation results such as Monte-Carlo analysis, eye diagram and noise analysis justify the proper performance of the proposed TIA which can be operated as a low-power building block in a 10 Gbps optical receiver system.