Fabricating high performance n-channel lateral double diffused metal–oxide–semiconductor transistors utilizing the shallow trench isolation as a salicide blocking mask of the drift region
Keywords: 85.30.T; 84.30.J; 81.05.C; 85.40.e; 85.30.TvBreakdown voltage; Drift; High-voltage; LDMOS; On-resistance; Saturation drain current; Standard logic process; System on a chip