Hybrid cascode feedforward compensation for nano-scale low-power ultra-area-efficient three-stage amplifiers

A modified frequency compensation technique is proposed for low-power area-efficient three-stage amplifiers driving medium to large capacitive loads. Coined hybrid cascode feedforward compensation (HCFC), the total compensation capacitor is divided and shared between two internal high-speed feedback loops instead of only one loop as is common in prior art. Detailed analysis of this technique shows significant improvement in terms of bandwidth and stability. This is verified for a 1.2-V amplifier driving a 500-pF capacitive load in 90-nm CMOS technology, where HCFC reduces the total capacitor size and improves the gain-bandwidth by at least 30% and 40% respectively, compared to the prevailing schemes.