کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
10365220 | 871971 | 2015 | 7 صفحه PDF | دانلود رایگان |
عنوان انگلیسی مقاله ISI
Reliability for nanomagnetic logic (NML) readout circuit under single event effect
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کلمات کلیدی
موضوعات مرتبط
مهندسی و علوم پایه
مهندسی کامپیوتر
سخت افزارها و معماری
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چکیده انگلیسی
In the application for the space radiation environment, NML circuits face a reliability challenge mainly from their CMOS peripheral circuits, suffering from single event effects (SEE). An on-chip readout interface circuit (RIC) for NML circuit is designed based on dual-barrier magnetic tunnel junction (DB-MTJ). The sensitive nodes to SEE in RIC are analyzed. The SEU required critical charge in RIC is described. The impacts of energetic particle hitting time and technology node on the critical charge are studied. As the technology node scales down, the critical charge will significantly decrease. Two efficient hardening technologies for RIC are presented: local transistors׳ size and symmetrical load capacitances. By increasing local transistors׳ size or decreasing the load capacitance, the critical charge will be improved, which enhances the immunity to SEE.
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Microelectronics Journal - Volume 46, Issue 1, January 2015, Pages 20-26
Journal: Microelectronics Journal - Volume 46, Issue 1, January 2015, Pages 20-26
نویسندگان
Baojun Liu, Li Cai, Yan Li, Qiang Kang,