کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
10411928 | 894841 | 2005 | 5 صفحه PDF | دانلود رایگان |
عنوان انگلیسی مقاله ISI
Fully compatible novel SNONOS structure for improved electrical performance in NAND Flash memories
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موضوعات مرتبط
مهندسی و علوم پایه
سایر رشته های مهندسی
مهندسی برق و الکترونیک
پیش نمایش صفحه اول مقاله
![عکس صفحه اول مقاله: Fully compatible novel SNONOS structure for improved electrical performance in NAND Flash memories Fully compatible novel SNONOS structure for improved electrical performance in NAND Flash memories](/preview/png/10411928.png)
چکیده انگلیسی
A fully integrated gate stack structure with an additional stoichiometric silicon nitride layer in the control oxide referred to as “SNONOS” is used to improve the electrical performance of nitride-based memories. The process is completely compatible with conventional silicon processes. By employing the new structure, the detrimental “back-tunneling” effect is suppressed without sacrificing device capacitance. Thus, a threshold voltage improvement of approximately 1.2Â V is observed for the erase state. Retention for devices with similar erase performance is also improved with the SNONOS structure. Further mitigation of the “back-tunneling” effect is observed for devices with high work function gate material.
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Solid-State Electronics - Volume 49, Issue 11, November 2005, Pages 1857-1861
Journal: Solid-State Electronics - Volume 49, Issue 11, November 2005, Pages 1857-1861
نویسندگان
Jeong Hee Han, Ju Hyung Kim, Seung Hyun Lee, Chungwoo Kim,