In-situ transistor reliability measurements through nanoprobing

In this study we examine the feasibility of performing transistor reliability measurements with the Hyperion II nanoprobing system. Proof-of-concept bias temperature instability (BTI) measurements were run on a commercially available Intel 14 nm FinFET processor. BTI degradation was found to closely follow the expected power law over 103 s stress in total at 2 V with characterization done <50 ms into recovery. Examination of 50 SRAM transistors with 30 s stress at 2 V yielded average ION reduction of 14.4% (σ = 6.6%) and 6.5% (σ = 2.5%) for pullups and pulldowns, respectively. The in-situ nature of the nanoprobing approach provides insight into transistor lifetime and performance as a function of layout as well as variations in aging between identically designed devices. This is a compelling reason to apply nanoprobing for a range of reliability measurements as a complement to the suite of established reliability testing techniques.