Growth of carbon nanotubes at temperatures compatible with integrated circuit technologies

The potential applications of carbon nanotubes grown for semiconductor and sensor devices are immense. But, this growth must be CMOS compatible and over large-areas, in excess of 4 inches in diameter, for any industrial interest. Reports of low-temperature growth of carbon nanotubes have mostly resulted in false dawns in the context of CMOS production, with direct integration for mass manufacturing remaining a challenge, as lower synthesis temperatures matched to manufacturing result in nanotubes with high defect levels. We report a unique ‘top-down’ synthesis method that allows energy delivery directly to the catalyst, resulting in higher quality nanotube growth at compatible low substrate temperatures. This growth is demonstrated over a large-area, whilst maintaining the silicon substrate below 350 °C. Long-range ordering of carbon nanotubes is supported by well developed second-order Raman peaks and HREM. The methodology developed is suitable to produce many nano-material systems, including graphene and silicon nanowires.

A radical novel design concept for the growth of carbon nanotubes over large-area using a top-down CVD process allows high energy delivery to the catalyst whilst maintaining the substrate below 350 °C. Raman, EELS and HREM confirm the quality of the nanotubes is comparable with conventional catalytic nanotube growth at temperatures above 700 °C.Figure optionsDownload as PowerPoint slideResearch highlights
► Effective energy delivery precisely to catalyst improves CNT growth at low-temperatures.
► The energy is delivered to the catalyst using infrared illumination.
► Thermal energy management via infrared reflector and thermal barrier layers.
► Quality of catalytic CNT growth over large-areas below 350 °C comparable to those at 700 °C.